Because of the continuous evolution of integrated circuit manufacturing (ICM) and design for manufacturability (DfM), most books on the subject are obsolete before they even go to press. That's why the field requires a reference that takes the focus off of numbers and concentrates more on larger economic concepts than on technical details.
Semiconductors: Integrated Circuit Design for Manufacturability covers the gradual evolution of integrated circuit design (ICD) as a basis to propose strategies for improving return-on-investment (ROI) for ICD in manufacturing. Where most books put the spotlight on detailed engineering enhancements and their implications for device functionality, in contrast, this one offers, among other things, crucial, valuable historical background and roadmapping, all illustrated with examples.
Presents actual test cases that illustrate product challenges, examine possible solution strategies, and demonstrate how to select and implement the right one
This book shows that DfM is a powerful generic engineering concept with potential extending beyond its usual application in automated layout enhancements centered on proximity correction and pattern density. This material explores the concept of ICD for production by breaking down its major steps: product definition, design, layout, and manufacturing. Averting extended discussion of technology, techniques, or specific device dimensions, the author also avoids the clumsy chapter architecture that can hinder other books on this subject. The result is an extremely functional, systematic presentation that simplifies existing approaches to DfM, outlining a clear set of criteria to help readers assess reliability, functionality, and yield. With careful consideration of the economic and technical trade-offs involved in ICD for manufacturing, this reference addresses techniques for physical, electrical, and logical design, keeping coverage fresh and concise for the designers, manufacturers, and researchers defining product architecture and research programs.
About the Author: Artur Balasinski is a Technology Design Integration Manager for Cypress Semiconductor in San Jose, California. He received the Ph.D.E.E. degree in MOS technology from Warsaw University of Technology, Poland, where he continued as assistant professor. He then joined research team at Yale University, New Haven, CT, to continue - studies on rad-hard devices. Subsequently, he joined the IC industry, first the R&D at STMicroelectronics, working on CMOS process transfers, and since 1997, at Cypress Semiconductor where, as Principal Technology-Design Integration (TDI) engineer, he developed expertise in characterization, process integration, optical proximity correction, and design rules. He has authored or coauthored about 90 papers (3 of them received Best Paper Awards), a book chapter, and has 15 U.S. patents. A member of BACUS Photomask Steering Committee, over the recent years, he attended SPIE, BACUS, VLSI, IEDM conferences where he formulated his views on DfM, as presented in several invited papers and special sessions.
