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Applications of Zero-Suppressed Decision Diagrams

Applications of Zero-Suppressed Decision Diagrams


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About the Book

A zero-suppressed decision diagram (ZDD) is a data structure to represent objects that typically contain many zeros. Applications include combinatorial problems, such as graphs, circuits, faults, and data mining. This book consists of four chapters on the applications of ZDDs. The first chapter by Alan Mishchenko introduces the ZDD. It compares ZDDs to BDDs, showing why a more compact representation is usually achieved in a ZDD. The focus is on sets of subsets and on sum-of-products (SOP) expressions. Methods to generate all the prime implicants (PIs), and to generate irredundant SOPs are shown. A list of papers on the applications of ZDDs is also presented. In the appendix, ZDD procedures in the CUDD package are described. The second chapter by Tsutomu Sasao shows methods to generate PIs and irredundant SOPs using a divide and conquer method. This chapter helps the reader to understand the methods presented in the first chapter. The third chapter by Shin-Ichi Minato introduces the frontier-based method that efficiently enumerates certain subsets of a graph. The final chapter by Shinobu Nagayama shows a method to match strings of characters. This is important in routers, for example, where one must match the address information of an internet packet to the proprer output port. It shows that ZDDs are more compact than BDDs in solving this important problem. Each chapter contains exercises, and the appendix contains their solutions. Table of Contents: Preface / Acknowledgments / Introduction to Zero-Suppressed Decision Diagrams / Efficient Generation of Prime Implicants and Irredundant Sum-of-Products Expressions / The Power of Enumeration--BDD/ZDD-Based Algorithms for Tackling Combinatorial Explosion / Regular Expression Matching Using Zero-Suppressed Decision Diagrams / Authors' and Editors' Biographies / Index


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Product Details
  • ISBN-13: 9781627056496
  • Publisher: Morgan & Claypool
  • Publisher Imprint: Morgan & Claypool
  • Height: 235 mm
  • No of Pages: 123
  • Series Title: Synthesis Lectures on Digital Circuits and Systems
  • Weight: 277 gr
  • ISBN-10: 1627056491
  • Publisher Date: 01 Nov 2014
  • Binding: Paperback
  • Language: English
  • Returnable: Y
  • Spine Width: 7 mm
  • Width: 191 mm


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